Oracle Plans to Speed Up Release of Next-Generation 28nm SPARC T5 Chip

Oracle Intends to Continue Building-In Special-Purpose Accelerators into Its Chips

by Anton Shilov
09/28/2011 | 10:11 PM

At the unveiling of systems based on Oracle's latest SPARC T4 microprocessor, the company said that it would accelerate its roadmap in order to deliver industry-leading enterprise solutions faster than its rivals. The company now aims to double performance every two years by boosting raw horse-power of the chips as well as building-in special-purpose accelerators that will speed-up its software.


Unlike some of its rivals on the market of server microprocessors, Oracle made no secret of its SPARC server chip roadmap and published it back in August, 2010. The company set an aggressive goal to create SPARC T-series systems with 128 physical CPU cores that will be able to handle up to 16 384 threads at the same time by 2015; and also increase the amount of sockets supported by SPARC T systems to eight in 2013 - 2014 timeframe. But apparently Oracle has managed to accelerate its roadmap and it plans to begin to test the next-generation SPARC T5 central processing unit (CPUs) already this October and will thus deliver them to market about a year earlier than it planned.

"We are actively in test and have [software] systems up and running along the next line of generation of [hardware] systems. We have made some modifications to this roadmap and we pulled-in some upgrades to T-series and added another upgrade to the T-series, which we will detail in the future," said John Fowler, executive vice president of systems at Oracle.

Nothing particular is known about the SPARC T5 microprocessor, but it is likely to expect it to be made using 28nm process technology so that to gain the amount of cores, clock-speed, cache size and so on. Besides, Oracle clearly stated that it will integrate proprietary special-purpose hardware accelerators into its chips to speed up its own software. For example, Oracle plans to add memory versioning, in memory columnar database acceleration, hardware decompression and other software-specific accelerators into its silicon.

"As we climb up the capability curve, one of the things we are doing is we starting to incorporate a lot more features into the silicon. With T4 generation we worked to ensure that dynamic threading, security and RAS were well taken care of on our stack. In future silicon designs, what we are now doing, is looking at acceleration of, for example, our native Oracle data types that underline the database, in dramatically improving coherency for building clusters to [boost] cluster performance, for protecting memory in large memory in memory applications and so on. We are working actively across different parts of the engineering team and instead of only [adding] threads and cores and clock and IO, which we will do, as we now are starting to embed core elements of acceleration of enterprise applications directly into the processor, which will give us tremendous amounts of capabilities [which we can measure by] performance, reliability, memory and so on," explained Mr. Fowler.

"We are on-track, or ahead of schedule, along the core microprocessor that will give us the next generation which will then add to all the other technologies that we are [developing] like [...] networking and Solaris to produce the world's best enterprise platforms," stated the vice president of Oracle.