AMD Quietly Adopting "Tick-Tock" Model for Micro-Architectures

AMD to Use Slightly Different Micro-Architectures for APUs and CPUs

by Anton Shilov
01/25/2012 | 08:37 PM

Intel Corp.'s so-called "tick-tock" model  of transitioning to new manufacturing processes and micro-architectures has proved to be very efficient in making Intel the maker of the highest-performance microprocessors. Apparently, its smaller rival Advanced Micro Devices is also plotting something similar, but a bit differently.

 

As it appears from AMD's documents observed by an X-bit labs reader (in the comments for this news-story), starting from Piledriver micro-architecture and going forward, AMD's Fusion accelerated processing units (chips that integrate both x86 and stream processing cores) will feature "reduced", or "early" micro-architectural feature-set, whereas central processing units (CPUs) based on new designs will feature "full" or "late" feature-set. As a result, x86 performance of the former will be lower than x86 performance of the latter.

AMD wants APUs to be released earlier than fully-fledged CPUs since they are aimed at broader segment of the market. Therefore, x86 cores of Fusion chips will sport "reduced" next-generation micro-architecture (and will fully support previous-gen features and capabilities) in order to cut their development time and reduce their die size. CPUs will come to market several months after APUs and will feature more advanced x86 cores that will support more new instructions and therefore will offer better x86 performance.

For example, only fully-fledged "late" Piledriver inside Viperfish (code-name of next-gen server/desktop die design, the successor of Orochi that powers FX and Opteron chips) will be able to execute numerous new instructions as well as will receive instructions per clock (IPC) increase. Even though reduced "early" Piledriver inside code-named Trinity APUs will be more advanced than the original Bulldozer, the x86 cores are projected to be slightly less efficient than those of the full Piledriver.

The "tick-tock"-like approach is expected to allow AMD to reduce time-to-market of its new products and ensure that innovations do not negatively affect yields. On the other hand, it will create difficulties for software makers who will have to take into account that x86 cores within one generation of APUs and CPUs are slightly different. In addition, it should be noted that AMD's "tick-tock" has nothing to do with transitions to newer process technologies and is almost completely about micro-architectures.

AMD did not comment on the news-story, but the company is projected to reveal more about its future plans at the forthcoming financial analyst day on the 2nd of February, 2012.