Toshiba Develops 64-Core System-on-Chip for Embedded Apps

Toshiba Unveils Many-Core SoC for Embedded Apps

by Anton Shilov
06/15/2012 | 02:46 PM

Toshiba Corp. said this week it had developed a low-power, many-core System-on-a-Chip (SoC) for embedded applications in such areas as automotive products and digital consumer products. The prototype SoC integrates 64 cores, eight times more than its multi-core predecessor unveiled in 2008 and operates 14 times faster.

 

Recent advances in multimedia processing, including video encoding and decoding and image recognition, have relied on multi-core processors that combine high performance with low power consumption. Many-core processors go a step further; by increasing the number of cores they boost SoC performance to much higher levels. However, the power consumption and size of many-core SoC have been problems for their use in embedded applications. Toshiba's many-core SoC secures significant advances in performance while maintaining low power consumption suitable for embedded applications.

Within a 209.3mm2 die, two 32-core clusters are integrated with dynamically reconfigurable processors, hardware accelerators, dual-channel DDR3 memory controller and other peripherals. Processor cores in one cluster share a 2MB level-two cache connected through a tree-based network-on-chip (NoC). The high scalability and low power consumption is accomplished by?the parallelized firmware for multimedia applications. For example, MPEG4-AVC/H.264 1080p 30fps decoding requires under 500mW of power, whereas super resolution 4K2K 15fps image processing demands under 800mW. The SoC integrates image recognition hardware accelerators. The new many-core SoC secures 1.5 trillion operations per second at 333MHz, a processing rate 14 times faster than that of its eight-processor multi-core predecessor.

The new SoC applies low power technologies throughout its structure, including multi-level power gating, clock gating and Toshiba's proprietary low power data-mapping flip-flop circuit. Advancing the fabrication process to 40nm secures a 40% to 50% boost in power efficiency over the company's previous multi-core chip, manufactured with 65nm process.

Toshiba plans to apply the many-core SoC and its related technologies to high performance over-HD (high definition) resolution image processing and recognition.