Intel to Discuss Haswell at Forthcoming Intel Developer Forum

Intel to Disclose Details About Next-Gen Haswell CPUs Next Month

by Anton Shilov
08/09/2012 | 08:36 PM

Intel Corp., the world's largest maker of microprocessors and supporting logic, will reveal loads of previously unheard details about its next-generation code-named Haswell micro-architecture at the Intel Developer Forum next month. The chipmaker will discuss all the peculiarities of the new chip design and will likely even demonstrate it in action.


During four sessions dedicated to Haswell, Intel will discuss the new processor innovations in general as well as advanced vector extensions 2 (AVX 2), bit manipulation new instructions (BMI) as well as transactional synchronization extensions (TSX) instructions and their benefits in particular. In addition, the company will have a session called "Experiencing the 3rd and 4th Generation Intel Core Microarchitecture", which implies that the company will compare both current Ivy Bridge as well as future Haswell capabilities.


Since the world's largesty chipmaker has demonstrated Haswell chips for a number of times already, this time the company will likely show it working. Unfortunately, it is unlikely that the company will discuss performance benefits of the new micro-architecture in details.

Intel Haswell microprocessors for mainstream desktops and laptops will be structurally similar to existing Core i-series "Sandy Bridge" and "Ivy Bridge" chips and will continue to have two or four cores with Hyper-Threading technology along with graphics adapter that shares last level cache (LLC) with processing cores and works with memory controller via system agent. The processors that belong to the Haswell generation will continue to rely on dual-channel DDR3/DDR3L  memory controller with DDR power gating support to trim idle power consumption. The chip will have three PCI Express 3.0 controllers, Intel Turbo Boost technology with further improvements and so on.

On the micro-architectural level the chip will be a lot dissimilar compared to available solutions. It is believed that the new Haswell x86 micro-architecture will be substantially different from existing, which will enable further scalability and performance increases. Besides, Haswell will support numerous new instructions, including AVX2,  bit manipulation instructions, FPMA (floating point multiple accumulate) and others. The new graphics core based on Denlow architecture is projected to support such new features as DirectX 11.1, OpenGL 3.2+, to be substantially more powerful and to be certified to run numerous professional applications.

Intel Haswell chips also implement a number of aggressive measures to trim power consumption, including power aware interrupt routing for power/performance optimizations, configurable TDP and LPM, DDR power gating, power optimizer (CPPM) support, idle power improvements, latest power states, etc.