by Anton Shilov
04/22/2013 | 10:03 AM
ARM believes that 14nm FinFET process technology currently in development by Samsung Electronics will help chip designers to boost performance in cases when it is needed most as well as to cut-down power consumption in idle cases. Nonetheless, there are challenges with development of chips and tools for such thin manufacturing processes.
“ARM partners design their SoCs with dynamic voltage and frequency scaling (DVFS) to achieve peak performance when needed and power efficiency for lower workload tasks. The lower nominal operating voltage of 14nm FinFET expands the voltage ranges in both underdrive and overdrive conditions. In an ARM Big.Little processing system, we can achieve higher performance on the top end of the range as well as higher efficiency in the middle and lower operating ranges,” said Ron Moore, director of strategic accounts marketing at ARM’s physical IP division.
Thin process technologies will let ARM and its partners to bolster performance of their microprocessors and therefore make them more competitive with off-the-shelf offerings from Intel or AMD when it comes to compute power. However, in order to develop very complex chips for state-of-the-art manufacturing technologies chip designers need sophisticated tools.
“In today’s high-performance, low-power SoCs, designers are using automated EDA flows to implement a wide range of low-power techniques such as clock gating, power gating, multi-Vt, multi-VDD and adaptive scaling in the form of dynamic voltage and frequency scaling (DVFS) or adaptive voltage scaling (AVS). As we look to deploy ARM technology on 14nm FinFET, we need to ensure that we can achieve power efficiency with these techniques or new alterative methodologies. At the same time, we are keenly aware of time-to-market pressures that create the need for accelerated core-hardening of ARM processors,” said Mr. Moore.
Earlier this year ARM promised that advanced manufacturing technologies will enable multi-core microprocessors with 16 or even 32 general-purpose cores. Such extensive amount of processing engines will enable new performance heights and more sophisticated devices running multiple apps at once. The design challenges will continue to intensify as the industry pushes toward smaller geometries, new transistor structures, materials, and lithography. As a result, the R&D investment to bring these technologies to the industry will continue to grow as well. Finally, there will be an increase in collaboration across the industry to speed the development and deployment of cost-effective semiconductor manufacturing.