by Anton Shilov
07/03/2013 | 10:36 PM
Intel Corp.’s co-processor products based on MIC [many integrated cores] architecture clearly have huge importance for the company since they are aimed at the most demanding and rapidly evolving market of high-performance computing. Regrettably, Intel is very tight-lipped about the future of its Xeon Phi-branded products as well as about its performance targets. This does not mean that Intel does not have clear plans.
According to a slide from an Intel presentation that leaked to the web (1, 2, 3), Intel Xeon Phi code-named Knights Landing will be released sometimes in late 2014 or in 2015. The chip, which will be made using 14nm process technology, will come in either PCIe co-processor card or CPU form-factor. The KNL co-processor will support new AVX 3.1 instructions, built-in DDR4 memory controller, on-package high-speed memory and a number of other innovations.
The most important aspect about the Xeon Phi “Knights Landing” product is its performance, which is expected to be around or over double precision 3TFLOPS, or 14 – 16GFLOPS/w; up significantly from ~1TFLOPS per current Knights Corner chip (4 – 6GFLOPS/w). Keeping in mind that Knights Landing is 1.5 – 2 years away, three times performance increase seem significant and enough to compete against its rivals. For example, Nvidia Corp.’s Kepler has 5.7GFLOPS/w DP performance, whereas its next-gen Maxwell (competitor for KNL) will offer something between 8GFLOPS/w and 16GFLOPS/w.
Code-named “Knights Landing”, the next generation of Intel MIC architecture-based products will be available as a coprocessor or a host processor (CPU) and manufactured using Intel's 14nm process technology featuring second generation tri-gate transistors.
As a PCIe card-based coprocessor, "Knights Landing" will handle offload workloads from the system's Intel Xeon processors and provide an upgrade path for users of current generation of coprocessors, much like it does today. However, as a host processor directly installed in the motherboard socket, it will function as a CPU and enable the next leap in compute density and performance per watt, handling all the duties of the primary processor and the specialized coprocessor at the same time. When used as a CPU, "Knights Landing" will also remove programming complexities of data transfer over PCIe, common in accelerators today.