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Slides that presumably come from ATI’s confidential roadmap which were leaked into the Internet recently indicate that the company’s forthcoming graphics chips code-named R520, RV530 and RV515 will support both types of interconnection interface – PCI Express and AGP 8x.

HKEPC web-site published a slide marked as ATI’s 2005 Desktop Roadmap and containing information about possible launch timeframes for ATI’s desktop visual processing units (VPUs) internally called as R520, RV530 and RV515. The R520 will, according to the slide, be available sometimes in the second quarter. The RV530 will be released sometimes in the Q3 2005, whereas the launch of the RV515 is scheduled towards the Q4 2005. All of those products will exist in AGP 8x and PCI Express x16 interfaces, either using ATI's Rialto bridge or existing in several types of ASICs. It is unclear how old the roadmap is.

ATI’s R520 is ATI’s next-generation high-end VPU to power graphics cards that cost from $400 to $550, the RV530 is presumably targeted at performance-mainstream segment with $200 - $350 graphics cards, while the RV515 is a mainstream graphics processor presumably to power products that cost less than $200.

The slide also notes that the chips are to be made using 90nm process technology, which may indicate that the manufacturing process is cost-effective even for mainstream components. The diagram also reveals that the R5-series chips will have “Kaleidoscope Consumer Electronics quality display controller”, but it is unclear what exactly the technology is about.

A representative for ATI’s top graphics cards partner Sapphire Electronics recently said ATI would release its next-generation high-end product R520 in June. Still, not much is known about the architecture and capabilities of the code-named R520 product that was initially referred as the R500. What is clear now is that the new graphics chip will sport Shader Model 3.0 – pixel shaders 3.0 and vertex shaders 3.0 – bringing additional programming capabilities to ATI’s future graphics processors as well as some other innovations.

Specifications of ATI’s code-named R520 VPU are unclear at this time. Some sources suggest that the chip may have up to 32 pixel pipelines and up to 350 million transistors, which makes the processor extremely complex. However, given that a new fabrication process is to be used for the manufacturing of R520, it is unlikely that the visual processing unit will be tremendously large in terms of transistor count and complex in terms of the number of pipelines. Fabless semiconductor designers tend to balance complexity of their chips for new fabrication processes. For instance, since 2002, ATI has not launched manufacturing of high-end graphics chips using a new process technology unless the technology was tested on mainstream chips. Still, even on relatively new manufacturing processes, ATI has set pretty high clock-speeds for its VPUs.

Representative for ATI Technologies never comment on unreleased products publicly.

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