by Anton Shilov
12/28/2009 | 08:08 AM
Nvidia Corp. will only release its next-generation GeForce graphics chip code-named GF100 (NV60, GT300, G300, etc) in March, 2010, a media report citing market rumours suggests. Even though the timeframe still belongs to previously announced launch schedule of code-named Fermi products, it was generally thought that the novelties will be released in January or February.
The leading supplier of graphics processors has reportedly notified its partners that it would officially launch the GeForce “GF100” graphics chip in March ’10, reports DigiTimes web-site. In addition, Nvidia plans to release a rather mysterious code-named GF104 chip in Q2 2010. The GF104 graphics processing unit will target the high-end market, according to the media report, which is quite strange as previously it was believed that the GF100 will be the next-gen high-end graphics solution from the company.
It is believed that Nvidia has to delay the release of the new graphics processing unit (GPU) because of abnormally low production yields, which means that either actual chips are very expensive to manufacture or demonstrate low performance. Earlier this month it transpired that Nvidia had to reduce the amount of activated stream processors inside GF100/Tesla T20 chips that will power Tesla 2000-series computing boards aimed at high-performance computing (HPC) market.
Nvidia did not comment on the information regarding launch timeframe of the GeForce graphics chip code-named GF100.
The only official comment concerning production of the next-gen lineup was made by the company’s chief executive Jen-Hsun Huang in November ‘09, who said that production of the GF100 would be ramped only in Q1 FY2011. Nvidia’s first quarter of fiscal year 2011 begins on the 26th of January and ends on the 26th of April, 2010.
The flagship Fermi graphics processor will feature 512 stream processing engines (which are organized as 16 streaming multi-processors with 32 cores in each) that support a type of multi-threading technology to maximize utilization of cores. Each stream processor has a fully pipelined integer arithmetic logic unit (ALU) and floating point unit (FPU). The top-of-the-range chip contains 3 billion of transistors, features 384-bit memory GDDR5 memory controller with ECC and features rather unprecedented 768KB unified level-two cache as well as rather complex cache hierarchy in general. Naturally, the Fermi family is compatible with DirectX 11, OpenGL 3.x and OpenCL 1.x application programming interfaces (APIs). The new chips will be made using 40nm process technology at TSMC.