Intel is to announce its code-named Grantsdale chipset only in the second quarter of 2004, but already now we know practically everything about this core-logic that represents a giant leap forward in PC technologies. Furthermore, we have learnt some important facts about the Lakeport chipset that is coming in the year 2005, a little bit less than in two years from now.

Due to its Stable Image program, Intel will from now unveil new platforms for mainstream desktop computers only once a year. Such approach is more convenient to the company’s partners and they should definitely appreciate it. Intel’s code-named Lakeport chipset will be another Stable Image in Intel’s roadmap till 2006, when it will be replaced by a new core-logic.

The Grantsdale series of chipsets is going to be the most innovative platform of the decade since it brings us a lot of exiting technologies, such as PCI Express interconnection, DDR-II SDRAM memory and Socket T (LGA775) for new microprocessors. The Lakeport chipset will inherit a lot from its parent and practically all it will bring will be some speed improvement over the Grantsdale family.

Traditionally, there will be, at least, two versions of the Lakeport: the Lakeport-G and Lakeport-P with and without integrated graphics core respectively. Both will support LGA775 processors with 800, 1066 or even 1333MHz Quad Pumped Bus as well as DDR-II memory at up to 667MHz clock-speed. Dual-channel PC2-5300 (DDR-II 667MHz) should provide enough bandwidth for CPUs with 1333MHz Quad Pumped Bus, hence, we can suggest that such microprocessors will emerge in 2005.

Surely, Lakeport chipsets will support code-named 90nm Tejas processors with 2MB L2 and some architectural improvements over the Prescott processors, but in case Tejas chips utilizing 65nm fabrication will emerge sometime in late 2005, the chipset should probably support them as well.

One of the very bright features provided by the Lakeport chipsets will be support for FB-DIMM memory modules. The FB-DIMM stands for Fully Buffered DIMM and represents a new approach of making memory modules. Such kind of DDR-II SDRAM devices will have a special hub-buffer onboard that will act as a concentrator for data and commands. This will allow increasing the number of memory modules supported by one channel in addition to overall improvement of peak memory bandwidth. Starting from 667 and 800MHz memory this buffer will be a compulsory part for DIMMs.

As for Lakeport’s integrated graphics core will support Pixel and Vertex Shaders 2.0, but there is also a slight possibility that Intel will integrate Shaders version 3.0 support as well.