Intel Corp. has published a product change notification (PCN) document concerning its 8-series chipsets that will support Intel Core i “Haswell” central processing units (CPUs). According to the paper, the company has already fixed the previously discovered USB 3.0 issues and is currently preparing the new stepping of core-logic for mass production. Intel will be ready to ship the fixed version this Summer.
Intel is initiating a C1 to C2 stepping conversion for the Intel 8-series/C220-series chipsets. C2 stepping has a metal layers change to fix the USB SuperSpeed device remuneration erratum. The C2 stepping of the Intel 8/C220 chipsets is pin-to-pin compatible with the C1 stepping and does not require any motherboard modifications. Based on USB SuperSpeed design fix implementation there is no need for full electrical regression testing, so hardware makers can install the new chipsets on existing designs. Customers may perform a limited USB SuperSpeed regression by checking a small subset of bulk, periodic and isochronous device types against customer’s existing USB3 validation tests focusing on S3/U3 cycles.
Intel will start to provide samples of 8-series/C220-series chipsets C2 stepping to customers starting from April 19, 2013. The first shipments of the fixed chipsets will begin on July 15, 2013.
Earlier in March it was reported that Intel began to inform its partners that when a PC system with Core i-series “Haswell” and 8-series chipset inside wakes from S3 sleep mode, it experiences issues with devices connected through USB 3.0. Intel seemingly defines the issue only as a nuisance for end users, as there would be no serious unpleasant consequences, such as data loss. A quick fix for the problem, which may result in blank PDF pages or failure to resume playback, is already known: a restart of applications. In order to solve the issues with USB 3.0, a new chipset revision is required.
Although Intel is on track to introduce its next-generation Core i-series “Haswell” microprocessors for desktops and notebooks in June, the company will limit the amount of microprocessors and mainboards based on C1 chipset revision on the market because of the USB 3.0 glitch before the platforms based on the C2 chipset stepping become widely available, which will happen in the second half of August at the earliest.