Micron Technology today announced sample availability of 288Mb reduced latency DRAM II (RLDRAM II) products. Micron is sampling 288Mb RLDRAM II devices operating at 400MHz  DDR. Micron’s RLDRAM II products are ultra high-speed DDR SDRAMs combining fast random access with extremely high bandwidth and high density targeting communication and data storage applications.

Today’s high-speed networking applications require increased bandwidth for high data transfer rates. RLDRAM II products’ eight-bank architecture is optimized to meet these requirements, achieving a peak bandwidth of 28.8Gb/s using a 36-bit interface and a 400MHz system clock. Micron’s RLDRAM II product samples boast a low latency and random cycle time (tRC) of 20ns, providing optimum bus utilization efficiencies beyond anything currently available in the market place. Additional advantages of the RLDRAM II product feature set include: on-die termination (ODT), multiplexed or non-multiplexed addressing, on-chip delay lock loop (DLL), common and separate I/O, programmable output impedance and a power efficient 1.8V core. These features offer designers optimum flexibility, providing a memory solution designed to fully optimize bus utilization whether the data bus is unidirectional or has a balanced READ and WRITE ratio.

RLDRAM II devices are available in a standard 144-ball FBGA, 11mm x 18.5mm package to enable ultra high-speed data transfer rates and a simple upgrade path from former products. Infineon and Micron co-developed the RLDRAM architecture, ensuring standardization, multi-sourcing, and functional compatibility.