Infineon Technologies AG and Nanya Technology Corp. announced today that both have successfully qualified memory chips produced using 90nm process technology with clients and core-logic designers. Both companies, as well as their joint-venture Inotera Memories, are now starting to ramp up production utilizing the latest fabrication process.
According to Infineon, DRAM volume production with 90nm process structures on 300mm has first started at Infineon’s 300mm production line in
By now Infineon and Nanya have validated 512Mb DDR SDRAM chips produced at 90nm nodes with clients. The extension of the portfolio with a 512Mb DDR2 SDRAM is expected in the second half of 2005, according to the statement. A variety of other products including 256Mb DDR2 and 1Gb DDR2 are to follow later on.
Process structures of 90nm further reduce chip size compared to the previous 110nm technology thereby increasing potential chip output per wafer by more than 30% at Infineon’s facilities. The expected productivity increase by shrinking the chip size combined with the use of 300mm wafers is the basis for a significant reduction of production cost per chip. Except for its cost advantage, transition to smaller process geometries is crucial for high-speed and low-power DDR2 and DDR3 SDRAM.
The companies said they were using 193nm lithography for both 110nm and 90nm process technologies. The manufacturers also indicated that the strategic development alliance of Infineon and Nanya also covers the next technology node with 70nm structures.