Rambus announced that IBM has signed a new license agreement to allow them access to Rambus’ XDR memory controller interface cell, dubbed XIO. This agreement enables IBM to provide an advanced, high-speed design for high-performance consumer applications utilizing the company’s 90nm ASICs.

“Rambus’ high-speed XIO cell combined with IBM's IP and advanced process technology capabilities will allow IBM to assist its customers in bringing high performing designs to the market,” the companies said in a statement without disclosing, which of IBM’s chips will obtain XDR memory controller.

The Rambus XIO cell is a high-performance, low-latency controller interface to XDR DRAM memory sub-systems. It is a versatile CMOS macro cell that can be seamlessly integrated into a wide variety of target processes. The general purpose cell is independent of the logical memory controller design, enabling support for a wide variety of memory applications needing high bandwidth and low latency. The XIO provides a wide, on-chip, CMOS-level signaling interface to the memory controller logic and a narrow, high-speed Differential Rambus Signaling Level (DRSL) interface to the external XDR memory system.

By licensing Rambus XIO IBM will be able to offer its clients ASICs supporting XDR memory.

“Rambus has a long history of designing and delivering very high speed, advanced interface designs that have been broadly used in the industry. We have worked with them on several projects and are pleased to build upon our existing relationship with this new agreement” said Tom Reeves, vice president of IBM’s Semiconductor Products and Solutions.