Innovative Silicon Inc., the developer of Z-RAM high-density memory intellectual property, and Hynix Semiconductor Inc. today announced that Hynix has agreed to license ISi’s Z-RAM for use in its DRAM chips. Z-RAM-based DRAMs will use a single transistor bitcell – rather than a combination of transistors and capacitor elements – representing the first fundamental DRAM bitcell change since the invention of the DRAM in the early 1970s. Hynix has received the first-mover opportunity to bring Z-RAM to the DRAM market; and to ensure this advantage, the two companies have committed considerable engineering resources to work side-by-side on the program.

Z-RAM was initially developed as the world’s lowest-cost embedded memory technology for logic-based ICs such as mobile chipsets, microprocessors, networking and other consumer applications. The technology was first licensed, in December 2005, by AMD for upcoming microprocessor designs. Later, however, AMD announced that they wouldn’t use Z-RAM technology for manufacturing of cache memory for their 65nm processors. By the way, IBM decided to equip its 45nm processors with eDRAM cache memory. Since AMD uses IBM’s developments, it is possible that they will do the same thing and will keep the Z-RAM license for some other purposes.

Hynix’ plans regarding Z-RAM are much more ambitious. Now, the engagement with Hynix positions Z-RAM to become the lowest-cost memory technology in the greater than $30B memory market. “Memory chips built using ISi’s Z-RAM technology will be much smaller and cheaper to manufacture. We are looking forward to working with Hynix on its next generation of DRAM chips, and to bringing tremendous performance and usability advantages to end-users,” noted Mark-Eric Jones, ISi CEO.

ISi’s Z-RAM stands apart from today’s standard DRAM and SRAM solutions as its single transistor (1T) bitcell architecture is the world’s smallest memory cell, making it the highest density, and therefore world’s lowest-cost semiconductor memory solution. Z-RAM’s one transistor memory bitcell is made possible by harnessing the Floating Body Effect (FBE) found in circuits fabricated using SOI (silicon-on-insulator) wafers. Moreover, since Z-RAM takes advantage of a naturally-occurring SOI effect, Z-RAM does not require exotic process changes to build capacitors or other complex structures within the memory bitcell.

Compared with SRAM, Z-RAM memory will boast 5 times the density. Compared with DRAM, Z-RAM is twice as dense. Z-RAM consumes the same amount of power as DRAM, but may be faster and smaller in size. Today’s Z-RAM samples can operate at 500MHz, which is not too fast. However, Z-RAM memory can boast five times the capacity from the same surface area.