Qimonda AG, a leading producer of various memory products, said this week it had begun to deliver samples of its XDR memory chips to undisclosed customers. As a result, Qimonda became the third supplier in the world to manufacture XDR, which is mainly used in Sony’s PlayStation 3 and some other devices.

“We are proud to deliver the first XDR samples less than one year after signing the technology license agreement with Rambus. XDR DRAM is a considerable value extension to the Qimonda high performance DRAM portfolio and opens new opportunities in various applications,” said Robert Feurle, vice president of business unit graphics at Qimonda.

Qimonda does not disclose clock-speed of its XDR samples, but said they have 512Mb capacity; chips of the same size are used in Sony’s PlayStation 3 game console. In fact, Rambus indirectly confirmed that Qimond’s XDR memory chips are intended for the latest game system from Sony.

“The close collaboration between our engineering teams enables a stable XDR DRAM supply base as an increasing number of consumer and digital entertainment applications require higher performance memory solutions,” said Sharon Holt, senior vice president of worldwide sales, Licensing and Marketing at Rambus.

It is interesting to note that back in March, 2007, Sony and Qimonda formed a joint-venture called Qreatic Design, which would develop high-performance, low power, embedded and customer specific dynamic random access memory (DRAM) for consumer and graphics applications. The companies did not elaborate whether it plans to tailor existing technologies, such as DDR, GDDR or XDR, for specific needs of the market, or the joint venture will develop brand-new memory solutions.

XDR DRAM can operate at 3.20GHz to 6.40GHz clock-speeds, providing industry leading bandwidth per pin, which is a benefit for networking and consumer applications. The XDR memory architecture features a number of advanced technologies built on patented Rambus innovations that include low-voltage, low-power differential Rambus signaling level (DRSL), octal data rate (ODR) technology that transfers eight bits of data each clock cycle, FlexPhase circuit technology for precise on-chip alignment of data with clock and dynamic-point-to-point (DPP) for both enhanced signal integrity and scalability.