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Qimonda AG, a leading supplier of dynamic random access memory (DRAM), has announced the commencement of commercial production of DRAM chips using its new buried wordline (trench) technology. The new manufacturing process allows to build smaller memory cells, which ultimately results in smaller chips and lower manufacturing costs.

“With the start of commercial production of our 65nm buried wordline technology, we have achieved a major milestone on our new technology roadmap,” said Kin Wah Loh, president and chief executive officer of Qimonda AG.

Qimonda had introduced a new technology roadmap and first functional samples based on its innovative buried wordline architecture in February 2008. The new trench architecture combines the power-saving benefits of Qimonda’s historical trench technology with a standard stack capacitor widely used in the DRAM industry. Qimonda’s innovative buried wordline concept draws on Qimonda’s experience in etching and filling structures in the silicon wafer, and represents a breakthrough in the field of DRAM cell technology on the way to achieving fully vertical cells, the company said. In addition, buried wordline technology supports a cell size reduction down to only 4F² (meaning a total chip surface area equal to only four times the size of the memory feature on the chip).

The first generation 65nm buried wordline technology already reduces the cell size to 6F² compared to 8F² for the 75nm technology currently in volume production at Qimonda. Combined with the smaller feature size, the 65nm technology increases the number of bits per wafer by more than 40% compared to the 75nm trench technology. The 46nm technology with 6F² cell sizes potentially offers more than twice the number of bits per wafer compared to the 65nm buried wordline technology – an improvement of 200% as compared with the 75nm node.

It should be noted that Micron and Samsung can also boast with 6F² cell sizes.

Qimonda’s revenues in October included the first sales of 1Gb DDR2 chips made using 65nm buried wordline technology. In addition, Qimonda has achieved first yields on the next generation 46nm Buried Wordline technology and has taped out what it believes is the worldwide smallest 2Gb DDR3 chip based on this technology.

 “We have increased wafer starts for 65nm buried wordline at our lead fab in Dresden to several hundred wafers per month and plan to convert additional capacities in the coming months. The 65nm process demonstrated high yields and we have received very positive feedback from the customers that had received samples, especially regarding the low power consumption feature of our new buried wordline technology. In addition we have achieved first yield on our next generation 46nm Buried Wordline technology ahead of schedule and are well on track to start mass production by mid 2009. Offering more than twice the number of bits compared to the 65nm technology, the introduction of our 46nm technology will be a major step towards our goal of technology leadership in manufacturing,” said Mr. Kin Wan Loh.

Tags: Qimonda, Buried Worldline, DRAM

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