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Rambus, a leading designer of memory and interface technologies, on Tuesday unveiled a list of its new technologies that should enable dynamic random access memory at beyond 3.20GHz clock-speeds next decade. The company hopes that developers of DRAM will license those technologies to implement them in the following generations of industry-standard memory.

“Product advancements in multi-core computing, virtualization and chip integration put ever-increasing demands on the memory sub-system. This collection of breakthrough innovations from Rambus allows for memory systems that are better suited for the bandwidth and workloads of these throughput-oriented multi-core processors, increasing the design and solution space for future main memory to enable a new generation of computing platforms,” said Craig Hampel, a Rambus Fellow.

This is one of the first times when Rambus openly proposes to license its technologies and/or patents and is not trying to offer either a “building block” or a fully integrated solution. Through the collection of technologies, according to Rambus, designers can achieve memory data rates beyond 3.20GHz, higher effective throughput, better power efficiency and the increased capacity necessary for future computing applications.

It is interesting to note that Rambus’ latest technologies, such as XDR and XDR2, has not gained popularity on the market. Virtually the only customer for XDR is Sony Computer Entertainment Inc., which uses the memory inside its PlayStation 3 game console. The XDR2 is still not used in the industry. As a result, for long-term success Rambus needs to license its technologies to volume manufacturers and/or become part of the general DRAM roadmap.

Rambus, among other things, propose the following technologies:

  • FlexPhase technology – introduced in the XDR memory architecture, can enable higher data rates compared to direct strobing technology used in DDR3;
  • Near Ground Signaling - supports high performance at greatly reduced IO power, allowing operation at 0.5V while still maintaining robust signal integrity;
  • FlexClocking Architecture - introduced in Rambus’ Mobile Memory Initiative, reduces clocking power by eliminating the need for a DLL or PLL on the DRAM;
  • Module Threading - increases memory efficiency and reduces DRAM core power, and when combined with Near Ground Signaling and FlexClocking technology, can cut total memory system power by over 40%;
  • Dynamic Point-to-Point (DPP) - provides a path for capacity upgrades without compromising performance through robust point-to-point signaling.

Tags: Rambus, XDR, DRAM

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