Rambus, a leading developer of high-speed interface technologies, teamed up with Kingston Technology, the world’s largest maker of memory modules, to demonstrate the benefits of its threaded memory module initiative. According to the company, threaded memory modules provide 50% performance increase amid 20% of power consumption drop. But they also require special memory controllers, which hardly a lot of companies will develop…

“Our innovative module threading technology employs parallelism to deliver the higher memory bandwidth needed for multi-core systems while reducing overall power consumption,” said Craig Hampel, a Rambus fellow.

Threaded memory module technology is implemented utilizing industry-standard DDR3 devices and a conventional module infrastructure. It is capable of providing greater power efficiency for computing systems by partitioning modules into multiple independent channels that share a common command/address port. At present Rambus is talking about dual-threading per module and claims that this allows multi-core processors to more efficiently work with memory.

Threaded modules can support 64-byte memory transfers at full bus utilization, resulting in efficiency gains of up to 50% when compared to current DDR3 memory modules. In addition, DRAMs in threaded modules are activated half as often as in conventional modules, resulting in a 20% reduction in overall module power, according to Rambus.

But the new technology requires new memory controllers as well as specially designed memory modules. Even though the latter will use conventional dynamic random access memory (DRAM) types, they will naturally be slightly more expensive to manufacture since they will have more complex traces. DRAM makers will not have to pay Rambus royalties, but memory module makers will likely to have such an obligation. Moreover, memory controller developers implementing memory threading will also have to pay the technology developer.

Considering the fact that memory controllers in contemporary personal computers are located inside microprocessors by Advanced Micro Devices or Intel Corp., it remains to be seen whether processor vendors are interested in implementing memory threading mechanisms developed by Rambus and pay royalties for every single central processing unit they sell.

Rambus will showcase a static demonstration of its threaded memory sub-system prototype at the Intel Developer Forum, which will be held from September 22 to 24, 2009, at Moscone West in San Francisco, California.

Earlier this year Rambus expressed its hopes that the industry will adopt its technologies for next-generation memory standards.

Tags: Rambus, Kingston, DDR3, DRAM