by Anton Shilov
11/07/2007 | 10:11 PM
Rambus, a leading designer of high-performance memory and interface technologies, on Wednesday said it had signed a memorandum of understanding with Intel Corp. under which the latter would explore possibilities to use XDR memory from Rambus with its products. No concrete decisions were announced, but the fact that Intel, which experiences was Rambus’ RDRAM was not well accepted, is noteworthy.
Rambus plans to dedicate certain technology and design resources to the effort and the evaluation will be done on Intel’s silicon process technology. The company stressed that Intel was only evaluating the technology for possible future uses and has no specific product plans for the XDR memory technology at this time.
Back in May, 2005, Rambus already said that it wants to get back into Intel’s roadmap with the ultimate goal to provide high-performance memory for personal computers. However, since then the industry successfully adopted DDR3 memory technology, dual-channel memory controllers became mainstream, triple-channel memory controllers are knocking the door and memory bandwidth is hardly a performance limiting factor for modern microprocessors.
Earlier in 2007 the memory technology company claimed that as the number of processing engines increases, requirements for higher memory bandwidth also go up. For example, single-core Intel Pentium Extreme Edition 3.73GHz had memory bandwidth as high as 8.5GB/s, whereas quad-core Intel Core 2 Extreme QX9650 chip has to be satisfied with 21.3GB/s bandwidth (or about 5.325GB/s per core). Moreover, dual-processor and multi-processor systems based on multi-core chips also, in case of Intel Corp.’s architecture, have limited memory bandwidth.
Rambus said that dual-channel DDR3 memory sub-system at 1.60GHz can provide “only” 25.6GB/s peak memory bandwidth, whereas its XDR2 can scale towards 102GB/s in case of 128-bit interface. It should be noted, however, that Intel’s code-named Nehalem chips with built-in triple-channel DDR3 controller will have peak bandwidth of up to 38.4GB/s for every physical processor and up to 153.6GB/s of total memory bandwidth for a 4P server system.
While up to 102GB/s bandwidth seems excessive today, if DDR3 clock-speeds start to stagnate at some point in future, while Intel Corp. manages to create an octa-core processor with performance limited only by memory bandwidth, the company may consider using XDR memory for high-performance desktop, workstation or server processors.
Recently Rambus also said that it plans to develop an XDR derivative that would be target handsets. If the technology becomes feasible, Intel may also be interested in utilizing high-performance, low-power, low pin count memory technology with its ultra-mobile platforms.