Toshiba’s Next-Generation HDTVs to Use Rambus’ XDR Memory

Toshiba Licenses XDR Memory for Use Within HDTV Chipset

by Anton Shilov
12/19/2007 | 12:20 PM

Toshiba Corp., a leading designer and producer of consumer electronics, this week said that it had licensed XDR memory technology from Rambus, a leading designer of dynamic random access memory (DRAM) and interface technologies. Toshiba plans to use XDR memory along with its next-generation core-logic for high-definition televisions (HDTVs).

 

Toshiba has licensed its XDR memory controller interface cell (XIO) and XDR memory controller (XMC) for next-generation high-definition television (HDTV) chipsets. The XIO and XMC will be implemented in Toshiba’s 65nm process and XDR memory will operate at 4800MHz. The new HDTVs are projected to be based either on the Cell processor developed by IBM, Sony and Toshiba, or Spurs Engine processor, which was developed by Toshiba; or derivatives of the aforementioned.

Higher memory performance as delivered by the XDR architecture enables the advanced features of next-generation HDTVs such as 1080p+ resolution, 120Hz refresh rates, 12-bit color, multiple full HD Picture-in-Picture (PiP) data streams, and advanced image enhancement algorithms, said Rambus. Toshiba did not unveil any details concerning its next-gen HDTVs.

Rambus solutions are backed by comprehensive engineering support services that range from chip design to system integration. XDR DRAM licensees include Elpida Memory, Qimonda AG, and Samsung Electronics.

“HDTVs now require as much memory bandwidth as many PCs in order to deliver the advanced features consumers demand. With the XDR memory architecture, we are able to achieve both superior performance and a reduced bill of materials for our customers’ HDTV applications,” said Hideki Moriyama, deputy general manager of the system LSI division at Toshiba’s Semiconductor Company.