Samsung Reveals 40nm Fabrication Process for DRAM

Samsung Touts Low-Power DDR2, DDR3, DDR4 Memory Chips Made Using 40nm Process Tech

by Anton Shilov
02/05/2009 | 11:46 AM

Samsung Electronics, the world’s largest maker of dynamic random access memory (DRAM), on Thursday said it has succeeded in developing 40nm process technology for memory products as well as has successfully validated the first DDR2 memory chips made using the process. According to Samsung, the new manufacturing technology opens doors to both low-power and cost-effective DDR3 as well as DDR4 memory chips.

 

“Securing extremely advanced technology and system/platform validated operability underscores our commitment as technology leader to deploying the most efficient means of producing DRAM in the marketplace,” said Kevin Lee, vice president of technical marketing at Samsung Semiconductor.

The first memory device to be produced on 40nm node by Samsung is 1Gb DDR2 chip capable of operating at 800MHz. Memory modules based on the new DRAMs have passed Intel Platform Validation program for use with the Intel GM45-series mobile chipsets.

The migration to 40nm class process technology is expected to accelerate the time-to-market cycle by 50% – to just one year, according to Samsung. Samsung plans to apply its 40nm class technology to also develop a 2Gb DDR3 device for mass production by the end of 2009.

Besides, the new 40nm fabrication process will drive further reductions in voltage against a 50nm class device, which Samsung expects to translate into about a 30% power savings. The finer DRAM technology node also delivers an approximately 60% increase in “productivity” over 50nm class process technology.

Thinner manufacturing technologies allow memory makers to produce more chips from a single silicon wafer, which makes chips considerably cheaper to build. Just days ago Qimonda, a struggling DRAM maker, said its 46nm process technology cuts production costs by up to 200% compared to 75nm fabrication process.

In addition, Samsung expects that its 40nm process node will mark a significant step toward the development of next generation, ultra-high performance DRAM technologies, such as DDR4.