by Anton Shilov
04/08/2009 | 07:34 AM
Memory and interface designer Rambus has acquired a number of patents from Inapac Technology to broaden its offerings for the mobile memory market. The acquired intellectual property should help Rambus to gain ground on the market of mobile devices.
These newly acquired patented innovations are key enablers for achieving high manufacturing yields in System-in-Package (SiP) implementations. SiP consists of a number of stacked integrated circuits (IC) – such as a media processor, DRAM, and flash memory device – enclosed in a single package or module. This technology allows designers to achieve high functionality in a very compact space, ideal for mobile products such as mobile phones and mobile gaming devices. Given its performance characteristics, SiP has applicability in computing and consumer electronics products as well.
Rambus’ Mobile Memory Initiative announced earlier this year focuses on high-bandwidth, low-power memory technologies targeted at achieving data rates of 4.3GHz at best-in-class power efficiency.
At 4.30GHz clock-speed, a 32-bit memory device can provide 17.2GB/s peak bandwidth; provided that Rambus wants to make such devices extremely effective in terms of power consumption, the memory technology may find itself inside powerful mobile multimedia-oriented devices, such as portable video game consoles, smartphones and so on.
“These patented innovations, which have been proven in shipments in over 90M DRAM devices in SiP implementations, broaden our portfolio for the mobile market. Combined with our high-performance, power-efficient memory technology, we offer compelling solutions that will help our licensees develop a new generation of breakthrough mobile products,” said Herb Gebhart, vice president of strategic development at Rambus.
Known to the industry as SiPFLOW, the acquired patented innovations greatly increase the assembly yield in SiP devices. Industry-leading reliability rates of less than 100 defective parts per million (DPPM) have been achieved in high-volume SiP containing a DRAM and media processor.