Intel and Micron Start to Sample 3-Bit-Per-Cell 25nm Flash Memory

Intel and Micron First to Sample 3bpc 25nm NAND Flash

by Anton Shilov
08/17/2010 | 12:34 PM

Intel Corp. and Micron Technology on Tuesday announced the delivery of 3-bit-per-cell (3bpc) NAND flash memory on 25nm process technology, producing the industry’s highest capacity, smallest NAND device. The companies have sent initial product samples to select customers.

 

Designed by the IM Flash Technologies, the 64 (8GB) multi-level cell (MLC) NAND flash chip produced using  25nm process technology stores three bits of information per cell, rather than the traditional one bit (single-level cell) or two bits. The industry also refers to 3bpc as triple-level cell (TLC.)

The new 64Gb 3bpc on 25nm memory device offers improved cost efficiencies and higher storage capacity for the competitive USB, SD (Secure Digital) flash card and consumer electronics markets.

The device is more than 20% smaller than the same capacity of Intel and Micron’s 25nm MLC, which is currently the smallest single 8GB device in production today, the two companies said. Small form-factor flash memory is especially important for consumer end-product flash cards given their intrinsic compact design. The die measures 131mm2 and comes in an industry-standard TSOP package.

“With January’s introduction of the industry’s smallest die size at 25nm, quickly followed by the move to 3-bit-per-cell on 25nm, we continue to gain momentum and offer customers a compelling set of leadership products. Intel plans to use the design and manufacturing leadership of IMFT to deliver higher-density, cost-competitive products to our customers based on the new 8GB TLC 25nm NAND device,” said Tom Rampone, Intel vice president and general manager of Intel NAND solutions group.

Intel and Micron expect to be in full production by the end of the year.