Samsung Develops Mobile Memory with "Wide" I/O Interface, Extreme Bandwidth

Samsung's New Mobile Memory Chip Features 512-Bit Bus, Contradicts Latest Trends

by Anton Shilov
02/22/2011 | 08:11 PM

Samsung Electronics on Tuesday unveiled a memory chip for mobile devices that contradicts the latest trends. Instead of making chip small and use a high-speed serial interface, the company decided to utilize a "wide" parallel interface instead which made the chip bigger and more expensive. However, Samsung claims that its solutions solves a number of problems for mobile devices.


The new 1Gb wide I/O mobile DRAM can transmit data at 12.8GB/s, which increases the bandwidth of mobile DDR DRAM (1.6GB/s) eightfold, while reducing power consumption by approximately 87%. The bandwidth is also four times that of LPDDR2 DRAM (which is approximately 3.2GB/s).

To boost data transmission, Samsung’s wide I/O DRAM uses 512 pins for data input and output compared to the previous generation of mobile DRAMs, which used a maximum of 32 pins. If you include the pins that are involved in sending commands and regulating power supply, a single Samsung wide I/O DRAM is designed to accommodate approximately 1200 pins.

The new mobile dynamic random access memory (DRAM) chip can store 1Gb of data and is made using a 50nm-class fabrication process. The new wide I/O mobile DRAM will be used in mobile applications, such as smartphones and tablet PCs.

Nowadays "wide" parallel interfaces are not very popular among developers of electronics devices. Firstly, chips utilizing wide interfaces, such as graphics processing units, are pretty expensive to manufacture from packaging standpoint. Secondly, such chips require complex print-circuit boards (PCBs), which results in high price of actual devices. Thirdly, larger chips are more expensive to make compared to smaller chips and high count of input/output  pins from time to time requires to make chips artificially larger. However, Samsung claims that its 1Gb memory chip with extreme bandwidth can be installed instead of a high amount of smaller chips and result in reduced costs and higher performance.

“Following the development of 4Gb LPDDR2 DRAM (low-power DDR2 DRAM) last year, our new mobile DRAM solution with a wide I/O interface represents a significant contribution to the advancement of high-performance mobile products. We will continue to aggressively expand our high-performance mobile memory product line to further propel the growth of the mobile industry, said Byungse So, senior vice president, memory product planning and application engineering at Samsung Electronics.

Following this wide I/O DRAM launch, Samsung is aiming to provide 20nm-class 4Gb wide I/O mobile DRAM sometime in 2013. The company’s recent achievements in mobile DRAM include introducing the first 50nm-class 1Gb LPDDR2 DRAM in 2009 and the first 40nm-class 2Gb LPDDR2 in 2010.

According to iSuppli, mobile DRAM’s percentage of total annual DRAM shipments will increase from about 11.1% in 2010 to 16.5% in 2014.

Samsung will present a paper related to wide I/O DRAM technology at the 2011 International Solid-State Circuits Conference (ISSCC) being held from February 20 to 24 in San Francisco.