Micron Further Cuts Memory Power Consumption with DDR3Lm Chips

Micron Reveals DDR3Lm DRAM with Low Self-Refresh Power

by Anton Shilov
02/09/2012 | 03:58 PM

Micron Technology on Thursday introduced a new product category of low-power DDR3 solutions targeted at the tablet and ultrathin notebook markets. These 2Gb and 4Gb DDR3Lm solutions focus on low self-refresh power (IDD6) for longer battery life, while maintaining the high performance and cost effectiveness of PC DRAM.

 

The first 2Gb DDR3Lm will provide up to 50% self-refresh power savings versus standard 2Gb DDR3L while driving performance up to 1600MHz when needed. Micron's 4Gb DDR3Lm product delivers the same optimized power efficiency as the 2Gb part, with a reduced chip count that is ideally suited for ultrathin and tablet customers. Both 2Gb and 4Gb DDR3Lm will be adopted into Micron's 30nm-class to further optimize the power and performance features, with the 4Gb device hitting a 3.7mA IDD6 target in standby mode, yet still supporting speeds up to 1866MHz.

"Power reduction is becoming ever more critical in the fast growing ultrathin markets.  Micron's expertise with traditional PC memory requirements enables these markets to enjoy high performance targets and optimal cost efficiencies. The combination of our commitment to customer collaboration and dedication to leading the way in DRAM technologies has proven highly successful, and this new class of 30nm DRAM continues to deliver on that promise," said Robert Feurle, vice president for Micron's DRAM marketing.

Sampling of Micron's new DDR3Lm low-power product line begins now, with volume production on 30nm class devices expected to begin in Q2 2012. Intel Corp. has already supported the idea to further cut power consumption of computer memory and will likely advice its partners to use DDR3Lm for Atom-based tablets as well as ultrabooks.

"As computing becomes more and more mobile, longer battery life is increasingly valuable to end users. The reduced standby power consumption of low-power memory is a move in the right direction," said Geof Findley, Intel's senior memory enabling manager.