Apparently, Intel’s Pentium M processor currently has fewer errata than any other mobile or desktop CPU from Intel launched throughout the last decade. As I discovered over the weekend, Pentium M presently has only 14 known errata, while the Pentium 4 counts for more than 73 errata, Intel Pentium III has 83 or more errata, the Pentium II features 92 errata and the original Pentium processor has 72 errata, though, most of Pentium’s errata were eventually fixed.
Here is the list of known errata found in the Pentium M processor:
- Performance Monitoring Event that counts Intel Thermal Monitor 2 transitions (59h) is not accurate;
- Performance Monitoring Event that counts the number of instructions decoded (D0h) is not accurate;
- RDTSC Instruction may report the wrong time stamp counter value;
- Code Segment limit violation may occur on 4GB limit check;
- FST Instruction with Numeric and Null Segment Exceptions may cause General Protection Faults to be Missed and FP Linear Address (
) Mismatch; FLA
- Code Segment is wrong on SMM Handler when SMBASE is not aligned;
- IFU/BSU Deadlock may cause system hang;
- Processor can enter a livelock condition under certain conditions when FP exception is pending;
- Write Cycle of Write Combining Memory Type does not Self Snoop;
- Performance Monitoring Event that counts Floating Point Computational Exceptions (11h) is not accurate;
- Inconsistent Reporting of Data Breakpoints on FP (MMX) loads;
- Code Breakpoint may be taken after POP SS instruction if it is followed by an instruction that faults;
- SysEnter and SysExit instructions may write incorrect Requestor Privilege Level (RPL) in the FP Code Segment selector (FCS);
- Memory Aliasing with Inconsistent A and D Bits may cause Processor Deadlock.
No fixes are planned for any of the errors. No idea if there are no more errata in the CPU found in future.