Nvidia Creates First Graphics Chip with Embedded DRAM

TSMC Produces Nvidia’s 65nm Mobile Graphics Chip with eDRAM

by Anton Shilov
03/06/2007 | 08:51 AM

Taiwan Semiconductor Manufacturing Company (TSMC) and Nvidia Corp. announced on Tuesday that TSMC has successfully produced a fully-functional sample of a graphics chip for handheld devices with embedded DRAM. While there are no details about the product, it once again shows the interest of a leading graphics chips designer towards the eDRAM technology.

 

“Nvidia is pleased to have collaborated with TSMC on their new 65nm embedded DRAM process, which has proven to be an excellent platform for our latest handheld GPU product. The efficiencies of the embedded DRAM process allowed us to raise the bar for features found in mainstream cell phones,” said Michael Rayfield, general manager of the handheld division of Nvidia Corp.

eDRAM (or embedded random access memory) allows to integrate much higher amount of memory into computer chips than static random access memory (SRAM) used today for caches in processors and graphics processors. Larger amounts of onboard memory mean higher bandwidth, which allows to use processing power of modern processing units more efficiently.

While Nvidia says that eDRAM allowed the company to pack more functions into mainstream class of handhelds, eDRAM may also allow the chip designer to develop solutions for applications that require higher graphics performance, e.g. handheld game consoles, digital media players with rich capabilities, etc.

The 65nm embedded DRAM process of TSMC is built on up to 10 metal layers using copper low-k interconnect and nickel silicide transistor interconnect. It features a cell size less than a quarter of its SRAM counterpart, and macro densities ranging from 4Mb to 256Mb.

TSMC 65nm embedded DRAM’s flexibility supports product designs that feature a smaller form factor by enabling both logic and memory functions to be built on a single device thus saving board space and enhancing systems reliability.

TSMC 65nm embedded DRAM uses a low thermal budget module that can be added to the company’s standard CMOS process. It is compatible with all 65nm logic libraries making it an efficient process for IP reuse. The embedded DRAM design features improved retention time and special power saving options for low power applications including sleep mode, partial power cut-off and on-chip temperature compensation.

In mid-February it transpired that Nvidia is seeking additional eDRAM engineers to work on graphics processors and other ASICs targeted at desktop, laptop, workstation, set-top box, wireless and home networking markets.