Taiwan Semiconductor Manufacturing Corporation will next week unveil some details of its first 65nm process technology and will demonstrate the first SRAM device made using the process. In addition, the company will also unveil its vision of addressing issues with design and manufacturing of the leading-edge processors at the company’s technology symposium next week.
Officials from TSMC cited by SiliconStrategies web-site said that the company plans to unveil its technology roadmap for making 65nm chips. Preliminary details about the intentions indicate that the first low-power 65nm devices will be out from the fab in late 2005, while the process for high-speed chips will be ready in the first half of 2006. The company will also announce that it has already produced the first SRAM device using the 65nm process.
At this time it is not clear what is “low-power” and what is “high-speed” chips, however, historically semiconductor producers make simplistic devices using innovative processes and once they see the fabrication technology is more or less mature, they move to more complex products.
Currently TSMC makes chips using various process technologies. The leading one is 0.13 micron fabrication process, nevertheless, late in 2004 or early in 2001 the company is projected to introduce a revamped version of this technology with thinner 0.11 micron nodes. The firm is also in process of finalizing its 90nm process.
Additionally, TSMC is also likely to bring out its “platform” approach, which is meant to address the disconnect between chip design and manufacturing, which has worsened in recent years with the shift to 130nm and 90nm process design rules.