Intel Corporation announced that it has begun a $2 billion construction project to convert a 200mm wafer fabrication facility to a 300mm facility in
When completed, the converted Fab 12 will become Intel’s fifth 300mm wafer facility. Five 300mm fabs provide the equivalent manufacturing capacity of about 10 200mm factories. Intel’s other 300mm fabs are located in
“This project represents a first for Intel – the first complete conversion of an existing 200mm wafer fab to a 300mm fab,” said Bob Baker, Intel senior vice president and general manager, Technology and Manufacturing Group.
There is not a lot of information available today about Intel’s 65nm processors and fabs that will handle their production, but there are some peculiarities of the process technology itself. The paramount details of the new process are Intel’s new advanced transistors, strained silicon technology and copper interconnects with new low-k dielectric:
- Intel’s new 65nm process will feature transistors measuring only 35nm in gate length, which will be the smallest and highest performing CMOS transistors in high-volume production. By comparison, the most advanced transistors in production today, found in Intel Pentium 4 "
" processors, measure 50nm. Small, fast transistors are the building blocks for very fast processors. Prescott
- Intel has integrated the second-generation version of its strained silicon into this process. Strained silicon provides higher drive current, increasing the speed of the transistors with only a 2% increase in manufacturing cost.
- The process integrates eight copper interconnect layers and uses a “low-k” dielectric material that increases the signal speed inside the chip and reduces chip power consumption.
Intel’s first working silicon made using 65nm technology process that will reach the commercial production stage in 2005 was showcased in late November 2003.