Intel Corp. Monday said that its engineers have further developed the company’s tri-gate transistors and indicated that the technology would be suitable for volume manufacturing in several years from now, according to observers, by the time when Intel starts making processors using 32nm or 22nm process technologies.
“Intel has successfully integrated three key elements – tri-gate transistor geometry, high-k gate dielectrics, and strained silicon technology – to once again produce record transistor capabilities. These results give us high confidence that we can continue
Planar (or flat) transistors were conceived in the late 1950s and have been the basic building block of chips since the dawn of the semiconductor industry. As semiconductor technology moves deeper into the realm of nanotechnology (dimensions smaller than 100nm), where some transistor features may consist of only a few layers of atoms, what was previously thought of as “flat” is now being designed in three dimensions for improved performance and power characteristics. Intel, leading the industry in producing high volumes of ever smaller chip geometries, has created a way to use these three-dimensional, or tri-gate, transistors in concert with other key semiconductor technologies “to enable a new era of energy-efficient performance”, the firm said. Intel expects tri-gate technology could become the basic building block for future microprocessors sometime beyond the 45nm process technology node.
Tri-gate transistors are likely to play a critical role in Intel's future energy efficient performance capabilities because they offer considerably lower leakage and consume much less power than today’s planar transistors. Compared to today’s 65nm transistors, integrated tri-gate transistors can offer a 45% increase in drive current (switching speed) or 50 times reduction in off-current, and 35% reduction in transistor switching power. Increased performance and reduced energy consumption improve the experience for users of PCs and other devices using Intel platforms.
Intel technologists will present a technical paper on this research on June 13 at the 2006 Symposium on VLSI Technology in