Taiwan Semiconductor Manufacturing Company (TSMC), the world’s largest contract semiconductor maker, has announced that it would start production of chips using 45nm fabrication process in September. According to the company, over ten customers already tried the new technology with many more capable of using it, as TSMC has also started to offer process-proven libraries and IP, design tools and reference flows.

TSMC’s 45nm process employs a combination of 193nm immersion photolithography and extreme low-k material. With an exceptionally high gate density and high-density 6T SRAM cell, more than 500 million transistors will fit into a 70mm² die area. TSMC’s low-power (LP) 45nm process is expected to be available first, followed soon after by the general purpose and high performance (GS) process. In addition, the 45nm logic family includes a low-power triple gate oxide (LPG) option. All three processes offer multiple Vt core devices and 1.8V, 2.5V, 3.3V I/O options to meet different product requirements.

According to TSMC, interest in the company’s 45nm process is high, as evidenced by broad participation in TSMC’s 45nm CyberShuttle prototyping program. A double-digit number of companies are on board the 45nm CyberShuttle along with a host of intellectual property (IP) vendors who are supporting the 45nm process. One 45nm CyberShuttle has been successfully completed already, while three more are scheduled for May, August and December.

“Our customers’ enthusiasm for the 45nm CyberShuttle is an auspicious leading indicator of the success of TSMC’s 45nm process,” said Dr. Rick Tsai, president and chief executive of TSMC. “We are marshalling the full resources of our design ecosystem to support our 45nm process and respond to the anticipated demand.”

Since 45nm is not an optical shrink from any previous-generation production technology, but a totally new fabrication process, chip designers, such as ATI, Nvidia or Xilinx, need to design their new chips nearly from the scratch to use the new process technology.