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At the SC10 trade-show dedicated to supercomputers, Intel Corp. demonstrated its first high-performance computing (HPC) accelerator for the first time on public. The code-named Knights Ferry device - which is not supposed to become a commercial compute solution and which is believed to be based on the code-named Larrabee GPU design - performed operations typically made on clusters or machines with many processing cores.

During SC10, Intel conducted demonstrations showcasing the real-world capabilities of the recently announced MIC (many Intel core) architecture. These included using Intel MIC architecture as a co-processor running financial derivative Monte Carlo demonstrations that boasted twice the performance of those conducted with prior generation technologies. The Monte Carlo application for Intel MIC was generated using standard C++ code with an Intel MIC-enabled version of the Intel Parallel Studio XE 2011 software development tools, demonstrating how applications for standard Intel CPUs can scale to future Intel MIC products.

Intel also showcased compressed medical imaging developed with Mayo Clinic on "Knights Ferry", the first Intel MIC design and development kits. This demonstration used compressed signals to rapidly create high-quality images, reducing the time a patient has to spend having an MRI.

Unfortunately, just like during previous presentations of MIC, Intel did not unveil raw computing performance of the Knights Ferry in GigaFLOPS or TeraFLOPS.

The Knights Ferry has 32 x86 cores clocked at 1.2GHz and featuring quad-HyperThreading. The unit, aimed at PCI Express 2.0 slots, has up to 2GB of GDDR5 memory. The chip itself has 8MB of shared L2 cache, which is quite intriguing by itself since highly-parallel applications do not require a large on-chip cache.

Given the fact that Knights Ferry is not a commercial product, but a development platform, it is unclear whether it has similar micro-architectural peculiarities as the Knights Corner chip, which is designed to be sold to interested parties. The Knights Corner will initially target HPC segments, such as exploration, scientific research and financial or climate simulation. The chip will be made on Intel's 22nm manufacturing  process and will have more than 50 Intel processing cores on a single chip. Intel itself stresses that neither KF nor KC are set to substitute traditional server processors since "the vast majority of workloads will still run best on Intel Xeon processors", whereas Intel MIC architecture will help accelerate select highly parallel applications.

Tags: Intel, GPGPU, Larrabee, SCC, Knights Corner, Tesla, FireStream, x86, Knights Ferry

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