Intel Corp. admits that IBM's approach for optical interconnections for chips is very interesting and progressive, but claims that its own way is more efficient in terms of performance and manufacturability.
IBM's CMOS Integrated Silicon Nanophotonics combine electrical and optical devices on a single chip. The new IBM technology can be produced on the front-end of a standard CMOS manufacturing line and requires no new or special tooling. With this approach, silicon transistors can share the same silicon layer with silicon nanophotonics devices. According to IBM, the new technology adds just a few more processing modules to a standard CMOS fabrication flow, to enable a variety of silicon nanophotonics components, such as: modulators, germanium photodetectors and ultra-compact wavelength-division multiplexers to be integrated with high-performance analog and digital CMOS circuitry. As a result, single-chip optical communications transceivers can now be manufactured in a standard CMOS foundry, rather than assembled from multiple parts made with expensive compound semiconductor technology.
By contrast, Intel proposes to make chips using the latest process technology on contemporary manufacturing foundries and then add all the necessary elements needed for optical interconnections.
"This [IBM] research is another example of others also validating that silicon photonics is the path to high bandwidth, low-cost optical communications. While this research is interesting, there are still many challenges to commercialise this approach such as integration of lasers and integration with advanced future transistor processes," said Nick Knupffer, an Intel's global communications manager, told in an interview with ZDNet UK.
According to the representative of Intel, IBM's approach simply makes manufacturing difficult. For example, chipmakers will have to develop fabrication processes with optical-related elements in mind.
"Keeping the CMOS and photonics separate will allow us to use the most energy-efficient, leading edge manufacturing process for electronics as we scale link speeds. For exascale systems, energy efficiency is a major concern. [...] Although [Intel's approach to nanophotonics] does require the bonding of indium phosphide to the silicon, this is done at the chip or wafer level, allowing us to create all the lasers we need in one bonding step," said Mr. Knupffer.