News
 

Bookmark and Share

(0) 

Taiwan Semiconductor Manufacturing Co. has released three silicon-validated reference flows within the open innovation platform (OIP) that enable 16 FinFET systems-on-chip (SoC) designs and 3D chip stacking packages. Leading electronic design automation (EDA) vendors collaborated with TSMC to develop and validate all these flows through multiple silicon test vehicles. There are three reference flows.

“These reference flows give designers immediate access to TSMC’s 16FinFET technology and pave the way to 3D IC Through-Transistor-Stacking (TTS) technology. Delivering our most advanced silicon and manufacturing technologies as early and completely as possible to our customers is a major milestone for TSMC and its OIP design ecosystem partners,” said Cliff Hou, vice president of R&D at TSMC.

16FinFET Digital Reference Flow

The 16FinFET digital reference flow uses the ARM Cortex-A15 multicore processor as a validation vehicle for certification. It helps designers adopt the new technology by addressing FinFET structure related challenges of complex 3D resistance capacitance (RC) modeling and quantized device width. In addition, the flow provides methodologies for boosting power, performance and area (PPA) in 16nm, including low-voltage operation analysis, high-resistance layer routing optimization for interconnect resistance minimization, path-based analysis and graph-dased analysis correlation to improve timing closure in automatic place and route (APR).

16FinFET Custom Design Reference Flow

The 16FinFET custom design reference flow enables custom design by addressing the growing complexity of 16FinFET process effects and provides methodologies for design compliance in 16nm manufacturing and reliability.

3D IC Reference Flow

The 3D IC process produces significant silicon scaling, power and performance benefits by integrating multiple components on a single device. TSMC’s 3D IC reference flow addresses emerging integration challenges through 3D stacking. Key features include through-transistor-stacking (TTS) technology; through silicon via (TSV)/microbump and back-side metal routing; TSV-to-TSV coupling extraction.

Tags: TSMC, 16nm, FinFET, Semiconductor

Discussion

Comments currently: 0

Add your Comment




Related news

Latest News

Monday, April 14, 2014

8:23 am | Microsoft Vows to Release Xbox 360 Emulator for Xbox One. Microsoft Xbox One May Gain Compatibility with Xbox 360 Games

Tuesday, April 1, 2014

10:39 am | Microsoft Reveals Kinect for Windows v2 Hardware. Launch of New Kinect for Windows Approaches

Tuesday, March 25, 2014

1:57 pm | Facebook to Acquire Virtual Reality Pioneer, Oculus VR. Facebook Considers Virtual Reality as Next-Gen Social Platform

1:35 pm | Intel Acquires Maker of Wearable Computing Devices. Basis Science Becomes Fully-Owned Subsidiary of Intel

Monday, March 24, 2014

10:53 pm | Global UHD TV Shipments Total 1.6 Million Units in 2013 – Analysts. China Ahead of the Whole World with 4K TV Adoption

10:40 pm | Crytek to Adopt AMD Mantle Mantle API for CryEngine. Leading Game Developer Adopts AMD Mantle

9:08 pm | Microsoft Unleashes DirectX 12: One API for PCs, Mobile Gadgets and Xbox One. Microsoft Promises Increased Performance, New Features with DirectX 12

3:33 pm | PowerVR Wizard: Imagination Reveals World’s First Ray-Tracing GPU IP for Mobile Devices. Imagination Technologies Brings Ray-Tracing, Hybrid Rendering Modes to Smartphones and Tablets

2:00 pm | Nokia Now Expects to Close Deal with Microsoft in Q2. Sale of Nokia’s Division to Close Next Month