Intel Corp. once promised, it can manufacture ARM-based microprocessors on its fabs for strategically important customers. As it appears, the first of such clients will be Altera Corp., whose Stratix 10 system-on-chips will feature both field-programmable gate array (FPGA) as well as four ARM Cortex-A53 general-purpose cores. The chips will be made using 14nm tri-gate process technology.
Altera Stratix 10 will incorporate a high-performance, quad-core 64-bit ARM Cortex-A53 processor system, complementing the device’s floating-point digital signal processing (DSP) blocks and high-performance FPGA fabric. The Cortex-A53 is among the most power efficient of ARM’s application-class processors, which also delivers important features, such as virtualization support, 256TB memory reach and error correction code (ECC) on L1 and L2 caches. Furthermore, the Cortex-A53 core can run in 32-bit mode, which will run Cortex-A9 operating systems and code unmodified, allowing a smooth upgrade path from Altera’s 28 nm and 20 nm SoC FPGAs.
When coupled with Altera’s advanced system-level design tools, including OpenCL, Stratix 10 heterogeneous computing platform will offer exceptional adaptability, performance, power efficiency and design productivity for a broad range of applications, including data center computing acceleration, radar systems and communications infrastructure.
“ARM is pleased to see Altera adopting the lowest power 64-bit architecture as an ideal complement to DSP and FPGA processing elements to create a cutting-edge heterogeneous computing platform. The Cortex-A53 processor delivers industry-leading power efficiency and outstanding performance levels, and it is supported by the ARM ecosystem and its innovative software community,” said Tom Cronk, executive vice president and general manager of processor division at ARM.
By standardizing on ARM processors across its three-generation SoC portfolio, Altera will offer software compatibility and a common ARM ecosystem of tools and operating system support. Embedded developers will be able to accelerate debug cycles with Altera’s SoC embedded design suite (EDS) featuring the ARM Development Studio 5 (DS-5) Altera Edition toolkit, the industry’s only FPGA-adaptive debug tool, as well as use Altera’s software development kit (SDK) for OpenCL to create heterogeneous implementations using the OpenCL high-level design language.
“High-end networking and communications infrastructure are rapidly migrating toward heterogeneous computing architectures to achieve maximum system performance and power efficiency. What Altera is doing with its Stratix 10 SoC, both in terms of silicon convergence and high-level design tool support, puts the company at the forefront of delivering heterogeneous computing platforms and positions them well to capitalize on myriad opportunities,” said Linley Gwennap, principal analyst at The Linley Group.