Today AMD disclosed one more version of its official plans concerning the new processor cores launching, containing some radical changes compared with what we know. The new official roadmap contains a sensations: the introduction of SOI technology, which was supposed to be first used in H2’02 in the Barton core has been postponed until the end of 2002 or even the beginning of 2003.

This is where the rumors about Barton cancellation come from, actually. Of course: no SOI means no Barton. However, AMD did a smarter thing: instead of the lines saying "0.13micron SOI", which used to stand right under Barton in the last roadmap, it says "0.13micron, 512KB L2 cache". In other words, AMD decided to simply change the Barton’s specifications. Although this core will not be produced with SOI technology, it will boast a twice as big L2 cache than that of Thoroughbred processor: 512KB. It means that Barton is none other but the same Thoroughbred but with larger cache-memory.

So far there is no info about the launching schedule for the upcoming Barton (Thoroughbred-512), however, I can’t help mentioning that doubling the L2 cache may be of real help for AMD in its competition with Intel Pentium 4 (Northwood). Besides, there is some info about Barton supporting 333MHz bus as well, though it still needs to be confirmed.

As a result, the new roadmap looks as follows:

So, the first processor to be produced with SOI and 0.13micron technology will be ClawHammer, which is due in the end of the year.

Also it is very interesting that AMD has moved the launching of the server Barton to H1 2003, when server SledgeHammer and dual-processor ClawHammer CPUs are due.

All other details of the new roadmap remained unchanged.