AMD, Chipmakers Discuss Ways to Improve Utilization of Current Chip Fabs

by Anton Shilov
10/24/2007 | 03:06 PM

Instead of investing into tools to manufacture larger 450mm wafers in the coming years a number of semiconductor companies, including the world’s second largest maker of x86 central processing units, Advanced Micro Devices, believe that it does make sense to maximize utilization of fabs already running.

Next Wafer Size – “Monumental Undertaking”

The demand towards semiconductors has been rising for decades and it is indisputable that manufacturing capacities for leading-edge chips need to be enhanced to meet future demand. There are different approaches to boost manufacturing capabilities without increasing the number of fabs, two of them are improving efficiency of existing 300mm fabs as well as transiting to larger 450mm wafers.

While Intel is prepping to move into the 450mm in about five years time or beyond, its rival Advanced Micro Devices wants to improve utilization of already running 300mm fabs before starting to utilize larger wafers. However, AMD’s approaches do not seem to be targeted only on 300mm fabs and will be useful for 450mm manufacturing too, thanks to added flexibility. In fact, some of AMD’s proposed techniques are already in use by the chipmaker’s Fab 30/Fab 36.

At the International SEMATECH (SEmiconductor MAnufacturing TECHnology) Manufacturing Initiative (ISMI) symposium various members of SEMATECH consortium shared the visions of the so-called NGFs (next-generation factory).

“Moving to the next wafer size is a monumental undertaking, and industry coordination is crucial to our success. We learned from the 300mm transition that early engagement of suppliers is essential, along with realistic assessments of industry economics and business models,” said Tom Abell, manager of ISMI’s wafer transition programs, in a statement.

Larger wafers provide lower per-device cost, however, they require special equipment and are generally more expensive to produce.

450mm Fabs Inevitable, But at the Right Time, Says AMD

Douglas Grose, senior vice president of manufacturing, technology development and supply chain at AMD, described at the forum what he and a list of industry leaders see as strategic imperatives for the next generation factory (NGF). Mr. Grose’s speech extended an ongoing NGF dialogue with integrated circuit manufacturers, material suppliers, tool vendors and industry analysts on how to maximize utilization of existing 300mm technologies and facilities before moving onto a larger, 450mm wafer size.

AMD said it is joining with industry partners, including ISMI, to develop new tools and processes for further streamlining both front-end and back-end production. For example, current practice across the industry is to move wafers through the process steps in 25 wafer batches, but most of the tools can only process a few or even one wafer at a time, greatly increasing the amount of time it takes to process an entire 25 wafers, slowing the delivery to the customer and extending time-to-revenue for the manufacturer. Small Lot Manufacturing (SLM) and Single Wafer Tools (SWT) are proposed changes that would greatly improve manufacturing efficiency, but requires an industry-wide shift in thinking. Collaborating on addressing this issue and others magnifies the impact by distributing investments of time, talent and money across all the parties that ultimately benefit.

AMD’s operations have already benefited from these NGF concepts. At AMD’s Fab 30 in Dresden, Germany, AMD has realized significant cost and time savings, including a 26% reduction in monthly wafer costs, a 31% increase in wafer output and a 72% increase in labor productivity.

“With a disciplined focus on what’s really important – delivering the products our customers want at the right time, at the right cost – we’re already seeing impressive results across AMD, but we’ve only realized a fraction of the full potential of the Next Generation Factory,” said Mr. Grose. “Our industry’s future will be determined by our ability to make smart decisions and unite behind a common vision.”

“We think 2012 would be the year for the 450mm wafers, so we need to start discussing it pretty soon, in the next six months. We need to start planning,” said Paolo Gargini, the Intel Corp. director of technology strategy who serves as the chairman of the International Technology Roadmap for Semiconductors (ITRS) at Semicon West in San Francisco, California, back in 2004. As of late 2005, the company was still mulling whether or not to start using 450mm wafers with D1E fab in Hilsboro, Oregon, starting from the year 2012.