Scaled CMOS Will Pave the Way for Moore’s Law for Decades to Come – Intel

International Planning Working Group for Nanoelectronics Sees No Viable Alternative for CMOS

by Anton Shilov
05/21/2009 | 09:09 AM

Some observers claim that modern complementary metal–oxide–semiconductor (CMOS) process technologies will not be able to scale beyond 16nm gate size (which is due in 2013, according to Intel Corp.) and principally new ways of making computer chips will need to be found. However, International Planning Working Group for Nanoelectronics sees no viable alternative to CMOS and believes that this tech will be used for decades to come.

 

Hundreds of research institutions around the world are looking into emerging devices that could someday replace charge-based CMOS, which forms the basis for today's computer chips. There have been predictions that as CMOS transistors continue to shrink, a point will eventually be reached at which quantum mechanical effects make them unusable or their power dissipation becomes prohibitive.

Intel is actively involved in the International Planning Working Group for Nanoelectronics (IPWGN), which collects and publishes data to stimulate and enhance inter-regional research cooperation in nanoelectronics. Among other things, the IPWGN tracks publicly funded research activities in three major regions – U.S., Europe, Japan. Some of the research topics include non-Boolean logic devices, metrology and characterization, modeling and simulation, and environmentally benign manufacturing.

As part of the IPWGN, Intel reported out at the International Nanotechnology Conference (INC) on Wednesday in Los Angeles, California. The IPWGN is reporting that a great deal of progress is being made, but no clear path beyond scaled CMOS has yet emerged. The IPWGN did identify numerous examples of inter-regional collaboration that could lead to a new path for Moore's Law, thereby ensuring the benefits of more computing capability at a lower cost per function.