ARM: SOI Process Technology Provides 40% Reduction in Power Consumption

ARM’s Test Chip Confirms Reductions Because Of SOI Usage

by Anton Shilov
10/12/2009 | 11:29 PM

ARM, a leading developer of low-power microprocessor technologies, said that the results from a silicon-on-insulator (SOI) 45nm test chip that demonstrate potential power savings of up to 40% over traditional bulk process for manufacturing chips. Usage of SOI process technologies will allow ARM to further reduce power usage of its chips without sacrificing their performance or, otherwise, boost performance without increases of power consumption.

 

“As a technology leader in physical IP and processors, ARM has been an active proponent of the benefits SOI may bring to our customers’ products. Investing the resources to conduct a bulk vs. SOI comparison provides useful data to address previously speculated claims and demonstrates that there can be performance and power savings benefits from SOI,” said Tom Lantzsch, vice president of physical IP division at ARM.

The test chip was based on an ARM 1176 processor and enables a direct comparison between SOI and bulk microprocessor implementations. The silicon results show that 45nm high-performance SOI technology can provide up to 40% power savings and a 7% circuit area reduction compared to bulk CMOS low-power technology, operating at the same speed. This same implementation also demonstrated 20% higher operating frequency capability over bulk while saving 30% in total power in specific test applications. 

The results confirm SOI technology is a viable alternative to traditional bulk process technology when designing low-power processors for high-performance consumer devices and mobile applications.

ARM and Soitec collaborated to produce a test chip to demonstrate the power savings in a real silicon implementation with a well-known, industry-standard core.  The goal was to produce a comparison of 45nm SOI high-performance technology with bulk CMOS 45nm low-power (LP) technology of the same product.

The design was implemented using ARM and IBM standard SOI libraries and leading EDA tools. The IP ecosystem and manufacturing solutions are in place for design starts with ARM and IBM libraries on IBM 45nm SOI technology.

“This benchmark by ARM and Soitec clearly demonstrates the potential power/performance benefits of our sixth-generation 45nm SOI technology now available to both ASIC and foundry clients,” said Mark Ireland, vice president of semiconductor products  and services at IBM.