Financial Analyst: EUV May Be Late Again and See Limited Usage

ASML May Further Suffer From EUV Lithography Delays

by Anton Shilov
03/06/2013 | 11:27 PM

A financial analyst said that instead of moving directly to extreme ultraviolet (EUV) lithography many chipmakers, including TSMC, the world’s largest contract manufacturer of semiconductors, will stick to alternative means to shrink sizes of transistors, such as multiple patterning, new materials and structures. As a result, ASML Holding, the main developer of EUV tools will suffer from limited demand.


“Absent EUV, we believe the current stock price discounts inflection in earnings driven by rising Litho intensity from Litho-Etch-Litho-Etch (LELE) Multiple Patterning (MP) which is overly optimistic, in our opinion. We expect the industry to move to increasing adoption of Self-Aligned-Double-Patterning (SADP), new materials and structures which will have an offsetting impact,” said Mahesh Sanganeria, an analyst with RBC Capital Markets, in a note to clients, reports Tech Trader Daily.

Nikon, the arch-rival of ASML, is reportedly shipping “close to 10 (7 immersion and 3 dry) scanner to Intel for 14nm technology ramp”, whereas ASML is shipping current-gen scanners primarily to TSMC, which needs to ramp up production of chips using 28nm and 20nm process technologies, which do not need EUV.

ASML's EUV demo system

Even though ASML believed that it would deliver the first commercial EUV tools to its customers in 2014 to produce chips using 10nm process technology, it is now believed that the EUV schedules will slip again and extreme ultraviolet will only be utilized for 7nm manufacturing process. The analyst bases his predictions on the fact that ASML’s new NXE3300 systems will not meet certain requirements.

“NXE3300 is not expected to meet Half-Pitch (HP) requirements for this node due to limited Numerical Aperture (NA) using Single Exposure (SE). Multiple patterning using EUV might prove to be exorbitantly expensive even if it were to meet exacting requirements of overlay and Line Edge Roughness (LER). We remain concerned that progress on EUV might continue to significantly lag accelerating requirements. We would like to note that Common Platform Alliance (IBM, Samsung and GlobalFoundries) have announced their intension to investigate EUV only at 7nm and beyond. Intel has indicated interest in using EUV at 7nm; however, we do not expect EUV to be production ready to intercept Intel’s 7nm timeline,” said Mr. Sanganeria.