Research firm Credit Suisse First Boston claimed in a recently released report that ATI Technologies, the world’s major supplier of visual processing units, is on track with introduction of its next-generation graphics processor in Spring, 2005, and said that the risks with major transition of process technology to 90nm are not tremendous.

R520 Taped Out, Yields are Key Risk

“ATI has completed test wafers on 90nm at TSMC and has hit its milestones to date for its next generation R520 product due out in Spring 2005,” CSFB wrote.

In early November a high-ranking source close to ATI Technologies confirmed that the chip known as the R520 had been taped out, which means that the completed design of the processor had been sent to an ATI’s foundry partner.

“Key risk ahead is achieving strong yields on 90nm, a point too early to call but potentially less risky since low-k and copper issues were resolved at 130nm. ATI noted that the next two years will see major architectural jumps (likely Pixel Shader 3.0 in 05 and DX10 for Longhorn in 06), raising the bar but requiring execution as well,” CFSB’s analysts Randy Abrams and Michael Masdea believe.

ATI’s current generation high-end visual processing units, such as RADEON X850 XT Platinum Edition, are made using 130nm low-k process technology. While it remains to be seen, whether this chip that contains more than 160 million of transistors is able to achieve strong yields with 540MHz – 550MHz clock-range, it may be assumed that 90nm design even with larger amount of transistors will offer clock-speeds in-line or higher than current high-end chips.

Bridging Today and Tomorrow

Not much is known about the architecture and capabilities of the code-named R520 product that was initially referred as the R500. What is clear now is that the new graphics chip will sport Shader Model 3.0 – pixel shaders 3.0 and vertex shaders 3.0 – bringing additional programming capabilities to ATI’s future graphics processors as well as some other innovations.

ATI’s R5xx architecture will not resemble that of the previous generation products and NVIDIA’s GeForce 6 architecture known as NV4x, particularly ATI will implement efficient flow-control, a crucial feature for pixel shaders 3.0, that will not bring speed penalty it does on existing SM3.0 hardware, according to sources. The future of the graphics hardware lies in higher number of ALUs ops per texture ops, unified pixel and vertex shaders as well as some other requirements of Microsoft Windows Longhorn operating system, such as virtualisation and context switches. While ATI agrees on the long-term goals for its roadmap, it does not name feature-set of actual products and says all the architectural changes will be implemented gradually, not at once.

Some sources claim that the R500 is a code-name of ATI’s graphics processor that will be submitted for Microsoft’s next Xbox console. The shader core of the R500 was reported to have 48 Arithmetic Logic Units (ALUs) that can execute 64 simultaneous threads on groups of 64 vertices or pixels. ALUs are automatically and dynamically assigned to either pixel or vertex processing depending on load. The ALUs can each perform one vector and one scalar operation per clock cycle, for a total of 96 shader operations per clock cycle. Texture loads can be done in parallel to ALU operations. At peak performance, the GPU can issue 48 billion shader operations per second, it was said.

The R520 is also expected to feature advanced memory interface, presumably supporting GDDR4 memory.

Competition Unclear

While NVIDIA remains extremely tight-lipped over its future products, it is known that the company is readying its code-named NV47 visual processing unit, a massively revamped GeForce 6 architecture with 24 pixel pipelines. The NV47 is expected to be released sometime in Spring, 2005, but it is unknown whether NVIDIA is ahead, or behind ATI’s R520 product.

The status of NVIDIA’s future architecture code-named NV50 is also uncertain: some reported recently that the chip had been cancelled, but officials decline to confirm or deny the information.